`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer: 
// 
// Create Date:    16:41:39 01/02/2014 
// Design Name: 
// Module Name:    switching_module 
// Project Name: 
// Target Devices: 
// Tool versions: 
// Description: 
//
// Dependencies: 
//
// Revision: 
// Revision 0.01 - File Created
// Additional Comments: 
//
//////////////////////////////////////////////////////////////////////////////////
module switching_module(
    input pseudo_switch,
    input [7:0] pixel_data_r,
	 input [7:0] pixel_data_g,
	 input [7:0] pixel_data_b,
    input [7:0] pseudo_data_r,
	 input [7:0] pseudo_data_g,
	 input [7:0] pseudo_data_b,
    input face_switch,
    input [7:0] face_data,
    output wire [7:0] video_r,
	 output wire [7:0] video_g,
	 output wire [7:0] video_b
    );
	
	supply0 gnd;
	
	assign video_r = ((pseudo_switch) ? pseudo_data_r : pixel_data_r) | ((face_switch) ? face_data : gnd);
	assign video_g = (pseudo_switch) ? pseudo_data_g : pixel_data_g;
	assign video_b = (pseudo_switch) ? pseudo_data_b : pixel_data_b;
	
endmodule
